800 Gb/s at the same time 1.6Tb/s Ethernet specifications also developed 200 Gb/s lanes of product shipments around 2027?

800 Gb/s at the same time 1.6Tb/s Ethernet specifications also developed 200 Gb/s lanes of product shipments around 2027?

If 100G × 16 is added to the AUI interface, standardization will be accelerated?

 As a result, at the following July meeting, Objective was modified and slightly touched at the end of the last time, and the "bad-headed solution" using OSFP-XD was immediately proposed, which is really funny. The sponsors were Mr. Paul Brooks of VIAVI solutions and Mr. Xinyuan Wang of Huawei.

 The two men suggested that standardization would be accelerated if 100G x 16 were added to the AUI interface. Historically, it was normal to include multiple AUI options in an Ethernet standard. For example, 800G also has 100G × 8 and 200G × 4, so 1.6T should have 100G × 16 and 200G × 8.

1.6Tb/sに関する仕様が追加されたほか、ちょこちょこ変更がある。出典は"Project Documentation Revisited - IEEE 802.3 Beyond 400 Gb/s Ethernet Study Group Electronic July 2021 Session"

 Extrapolating from the past CMOS roadmap, when AUI can achieve 200G lanes will be 2026-2027. He insists that no matter which day the transition is made to 200g, the time to get there can be connected by a 100g fairway.

筋から言えば、200G×8と400G×4という気もしなくはないが、200Gですら四苦八苦している現状で、400G×4なんてオプションが用意できるはずがないのも自明だプロセスノードで言えば3ないし2.1nm(これはTSMCのプロセスノードが前提だと思われる)あたりで200Gが可能になると見ており、3nmは早ければ2022年末から2023年初頭に可能となるが、2nmは2024~2025年あたりとみられる(この世代、TSMCもGAAFETを導入する関係で、どこまでスムーズに行くかはっきりしない)

 In addition, in the case of 100G × 16, it also has the advantage of starting the testing tool as early as possible.

800Gb/sと同時に1.6Tb/s Ethernet仕様も策定へ 200Gb/sレーンの製品出荷は2027年頃?

 Of course, suppliers hope that if standardization is completed (before that, if possible), they will launch products that meet this standard. In the case of such cutting-edge products, it is not uncommon to go from planning to production for about 2 years.

 Of course, if ASIC is generated here, it will take more than 1 to 2 years, but in the case of test equipment and first-generation products, FPGA-based development is not uncommon, so that mass production can be carried out after Tape out (the design of physical configuration cabling is completed). The problem is that the FPGA corresponding to 200G is quite far away.

実際は、SerDes以外にもさまざまな要素が絡むが、いずれにしても現行のFPGAでは足りないことだけははっきりしている。次世代製品の投入時期も、現状では不明なままだ既にテスト機器メーカーは200G/Lane世代を見据えたテスト機器の開発に着手しているのだろうが、これが現実に提供できるのは相当先になりそうだ

 In the sense of this cutting-edge product, the "Virtex/Versal" series of Xilinx or the "Stratix/Agilex" series of Intel (formerly Altera), whether it is Xilinx's Versal Premium or Intel's Agilex, the current general high-speed SerDes equipped with 58G under NRZ (112G of PAM4 and 116G of Agilex) has the maximum speed, and there is no product corresponding to 200G.

 As a result, the 1:2 Gearbox can only be put outside the FPGA in some way, and development and verification stop until it is ready. However, if the aforementioned OSFP-XD can be used, 100G × 16 becomes possible in reality.

 Of course, if it's a 16-lane AUI, you need to prepare the FEC that crosses it, so it's not that you don't need rework. However, he believes that the cost is very small and the possibility of realization is very high.

OSFP-XDの実現可能性をまずチェックすべきだと個人的には思うが、OSFP内部での作業でもあり外からは伺い知れない。というか参考文献がLightwave Onlineというあたりが……200/400G Ethernetで16レーンという仕様は既に存在しているから、この延長だと言えばその通りなのだが……

 Moreover, if 100 Gb/s channels are available, at least as far as AUI is concerned, development is already under way (there is a corresponding FPGA), so you can start the development of various components and test equipment.

 And, if the process is refined, it is expected to correspond to 200 Gb/s lanes around 2025, and products with 200 Gb/s lanes that take advantage of this are expected to be available around 2027.

100Gレーンベースの測定機器(T&M:Test & Measurement)が先行すれば、これを200Gにするのはそう難しくないというのも、その通りだこれが通ったら、なし崩しにSMF×16の仕様も追加されそう……

 This will lead to the early startup of 1.6T Ethernet, which is by no means a bad story. Therefore, the proposal to add a 16-channel structure to 1.6Tb/s Ethernet's AUI ends the demonstration, but this is only the specification of AUI, the device and module (or module interior), without taking into account the optical interface.

 If the current structure of 200 Gb/s × 8 lanes is taken as the premise, 2:1 Gearbox must be added into the module. What about the Gearbox measuring instrument? It seems to turn into a story like this. Including this, although you can understand what you are saying, you can't erase the feeling of a "bad solution". No, if specifications such as SMF x 16 match this, it makes sense.

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